W5300

Product Summary

The W5300 is a 0.18 um CMOS technology Fully Hardwired Network protocol Embedded Ethernet Controller. The W5300 is designed for Internet embedded applications where easy implementation, stability, high performance, and effective cost are required. The applications of the W5300 are Set-Top Boxes, PVRs, Digital Media Adapters, Access Controls, LED displays,POS / Mini Printers, Copiers, Storage Devices, Network Printers, Home Network Sensors, DVRs, Network Cameras, Kiosks, Factory and Building Automation, Medical Monitoring Equipment, Embedded Servers.

Parametrics

W5300 absolute maximum ratings: (1)DC supply voltage:-0.5 to 3.6V; (2)DC input voltage:-0.5 to 5.5V (5V tolerant); (3)DC output voltage:-0.5 to 3.6V; (4)DC input current:±5mA; (5)DC output current:2 to 8mA; (6)Operating temperature:0 to 80℃; (7)Storage temperature:-55 to 125℃.

Features

W5300 features: (1)Supports hardwired TCP/IP protocols : TCP,UDP, ICMP, IPv4, ARP, IGMPv2, PPPoE, Ethernet ; (2)Supports 8 independent SOCKETs simultaneously ; (3)High network performance : Up to 50Mbps ; (4)Supports hybrid TCP/IP stack(software and hardware TCP/IP stack) ; (5)Supports PPPoE connection (with PAP/CHAP Authentication mode) ; (6)IP Fragmentation is not supported ; (7)Internal 128Kbytes memory for data communication(Internal TX/RX memory) ; (8)More flexible allocation internal TX/RX memory according to application throughput ; (9)Supports memory-to-memory DMA (only 16bit Data bus width & slave mode) ; (10)Embedded 10BaseT/100BaseTX Ethernet PHY ; (11)Supports auto negotiation (Full-duplex and half duplex) ; (12)Supports auto MDI/MDIX(Crossover) ; (13)Supports network Indicator LEDs (TX, RX, Full/Half duplex, Collision, Link, Speed) ; (14)Supports a external PHY instead of the internal PHY ; (15)Supports 16/8 bit data bus width ; (16)Supports 2 host interface mode(Direct address mode & Indirect address mode) ; (17)External 25MHz operation frequency (For internal PLL logic, period=40ns) ; (18)Internal 150MHz core operation frequency (PLL_CLK, period=about 6.67ns) ; (19)Network operation frequency (NIC_CLK : 25MHz(100BaseTX) or 2.5MHz(10BaseT)) ; (20)3.3V operation with 5V I/O signal tolerance ; (21)Embedded power regulator for 1.8V core operation ; (22)0.18 μm CMOS technology ; (23)100LQFP 14X14 Lead-Free Package .

Diagrams